Hardware Security - Dynamic Verification - Security Processor Properties
We present a methodology for identifying security critical properties for use in the dynamic verification of a processor. Such verification has been shown to be an effective way to prevent exploits of vulnerabilities in the processor, given a meaningful set of security properties. We use known processor errata to establish an initial set of security-critical invariants of the processor. We then use machine learning to infer an additional set of invariants that are not tied to any particular, known vulnerability, yet are critical to security.
We build a tool chain implementing the approach and evaluate it for the open source OR1200 RISC processor. We find that our tool can identify 19 (86.4%) of the 22 manually crafted security-critical properties from prior work and generates 3 new security properties not covered in prior work.
Prof. Cynthia Sturton
Email: csturton [at] cs [dot] unc [dot] edu
Email: rzhang [at] cs [dot] unc [dot] edu
Email: stanleyn [at] email [dot] unc [dot] edu
Email: cgriggs [at] cs [dot] unc [dot] edu
Email: achi [at] cs [dot] unc [dot] edu
This research is supported by the National Science Foundation (NSF).