Architecture Design Certification Other
Name CPU Arch Kernel Arch Multicore? Scheduling Slack scheduling? Mixed criticality Synchronization Addressing Interrupts POSIX? ARINC 653? DO 178-B? MILS? License
QNX Neutrino x86, SH-4, PowerPC, MIPS, ARM Microkernel Yes "Priority-based preemptive" Yes, by allowing partitions to overrun budgets when underutilized. Called "adaptive partitioning" Yes, through budgets and priorities Semaphores and Mutexes Uses MMU to partition memory ISR priority higher than any task priority, blocking allowed Conformant to 1003.13-2003 No No No Closed source
LynxSecure x86, possibly others Embedded hypervisor and separation kernel (likely monolithic) Yes Fixed-cyclic ARINC 653-based (default), dynamic scheduling policies also permitted. Unknown Unsure. Most likely. Hypervisor supports some sort of communication between virtualized OSes. Unclear how this is done. Partitioned address space for the VMs that most likely uses the MMU. Not discussed. In guest OSes, I suppose. Yes Says that the OS is “Designed to support” it Yes Closed source
LynxOS-178 x86 and PPC Monolithic No (not mentioned) ARINC 653-based fixed-cyclic scheduling Unknown Yes Everything that ARINC 653 dictates, plus POSIX Virtual memory with MMU Split interrupts with kernel threads (see Lynx website for more). Yes Yes Yes Not mentioned Closed source
RTLinux (early version) x86 Monolithic (Linux) No Provides priority-based preemptive and EDF, or user can write their own. RT tasks run in kernel at high priority. Linux kernel runs as a background task. No No Simple FIFO buffers (RT-FIFO) Same as linux, but RT tasks run in kernel mode as modules. Hardware interrupts caught by emulator and deferred. In non-RT tasks. No No No Varies, but a free version is now available.
VxWorks ARM, ColdFire, x86, x86_64, XScale, MIPS, PowerPC Monolithic Yes 256 User Static Priorities No? No? Spinlocks, Atomic memory operations, Memory barriers, semaphores, message queues, others Supports normal MMU and non-overlapping modes Assigned to CPUs at boot time. Other details not clear. Compliant No No No Closed source
LynxOS RTOS x86, Motorola/IBM PPC, Freescale PowerQUICC II and III, AMCC 4xx PPC Monolithic SMP support FIFO, priority quantum (256 priority levels), round-robin, or non-preemptive Unknown Unsure. Message queues, semaphores, shared memory, POSIX (sockets, signals, pipes, mutexes, etc.) Demand paged virtual memory using an MMU Split interrupts with kernel threads (see Lynx website for more). Yes Maybe, using round-robin (see scheduling)? Yes Not mentioned Closed source
DeOS x86, PPC Microkernel No (possibly in progress) Rate monotonic w/ slack pool Yes Yes Mutexes, semaphores, shared pages, message passing Uses MMU/Virtual Memory in the normal way Can be handled directly in user applications. Unknown if kernel interrupts are split. No No Yes No Closed source
L4 (Fiasco) x86, ARM, PowerPC Microkernel Yes Not clear, but does periodic tasks natively No? No? POSIX Threads capabilities Paging in software with virtual memory Appears to support two different modes, one of which may be polling Compliant No No No GPL
VxWorks 653 PowerPC, x86 Separation Kernel (Microkernel), Choice of Partition OS No (though Core 2 is a target) Time partitioning (multiple modes supported), static priorities within partitions Yes (can priority schedule a different partition when a partition is out of work) Yes Mutexes, memory locking, message queues, semaphores, signals, blackboards MMU-based hardware partitioning Not clear Compliant Yes Yes No Closed source
Integrity ARM, Power, Blackfin, OCTEON, Coldfire, x86, MIPS, DaVinci, OMAP Separation kernel (Microkernel) Yes "Priority-based" No? Yes Everything POSIX, highest locker semaphores to prevent priority inversion Uses MMU to partition memory Claims <1 nanosecond latency, never blocks or masks Conformant Available (probably precludes multicore) Available (probably precludes multicore) Available (precludes multicore) Closed source
FreeRTOS x86 (real mode only), 25 or more embedded devices Extremely small monolithic No Dynamic priority round robin with support for an arbitrary number of compile-time priority levels. No No Mutexes, semaphores, queues. Architecture dependent. Nothing special. No No No No Modified GPL (no code re-release required)
VxWorks MILS PowerPC Separation Kernel (Microkernel) and can use choice of guest OS or "bare metal" High Assurance Environment No Time partitioning (multiple modes supported), static priorities within partitions Yes, very limited (applications can donate time to device drivers) Yes Mutexes, memory locking, message queues, semaphores, signals, blackboards (within partitions) Static space partitioning Not clear No? No? No? Yes Closed source
PikeOS many Microkernel Yes Uknnown; schedules virtual machines Unknown Unknown Unknown Unknown Unknown Yes Yes Unknown No Closed source
Nucleus OS (Successor to VRTX, apparently) ARM, MIPS, Freescale, Power, PowerPC, probably others Not clear Yes Not clear No? Yes Includes at least semaphores but appears to require manual priority inheritance "Full MMU Support" Not clear. Compliant No Yes (Perhaps not with multicore?) No Closed source
LynxOS-SE RTOS x86 Monolithic No (not mentioned) ARINC 653-based fixed-cyclic scheduling Unknown Yes Everything that ARINC 653 dictates, plus POSIX Unknown, likely the same as LynxOS RTOS Split interrupts with kernel threads (see Lynx website for more). Yes Yes Says that the OS is “Designed to support” it Not mentioned Closed source
VxWorks Hypervisor x86, x86_64?, PowerPC Separation Kernel (Microkernel) with choice of partition OS Yes Time partitioning or static priorities No? (but could happen within a partition) Yes Just OS within partitions Separate virtual memories Not clear Just OS within partitions No? No? No Closed source
eCos ARM, CalmRISC, FR-V, Hitachi H8, IA-32, Motorola 68k, Matsushita AM36, MIPS, NEC V8xx, NIOS II, PowerPC, SPARC, SuperH Microkernel Yes (At least experimental SMP in kernel now) Can do Multilevel Queue (FIFO with 32 static priority levels), bitmap (only one task allowed at each of 32 static priority levels), or, with special configuration, Lottery! Preemptive except when scheduling flag disabled. No No Mutexes, Semaphores, Condition Variables, Flags, Message Boxes, Spinlocks MMU-enabled, but all software shares an address space Split interrupt handling, but all interrupts prioritized over threads Compliant No No No GPL
VxWorks Cert (basically just a certified version of VxWorks) Not clear Monolithic? No 256 User Static Priorities? No? No? Semaphore, Signal, Others? Supports normal MMU and non-overlapping modes? Not clear Compliant No Yes No Closed source